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Logic synthesis
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#	Item
101	Datasheet VCS Xprop Increasing the Efficiency of X-related Simulation and Debug Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:23 Hardware verification languages Digital electronics Verilog VHDL Logic simulation Register-transfer level SystemC Logic synthesis Synopsys Electronic engineering Electronic design automation Hardware description languages
102	School of Engineering. Universitat Rovira i Virgili Summer Study Abroad Courses 2015:    Add to Reading List Source URL: www.urv.cat Language: English - Date: 2015-03-27 06:40:06 Design Electronics Power electronics Electric vehicle Electrical engineering Field-programmable gate array Logic synthesis Amplifier Electronic engineering Rovira i Virgili University Tarragona
103	Programming with constraint solvers toward a shared infrastructure for code checking, angelic execution, debugging, and synthesis Add to Reading List Source URL: homes.cs.washington.edu Language: English - Date: 2014-08-13 19:27:02 Constraint programming Electronic design automation Formal methods Logic in computer science NP-complete problems Satisfiability Modulo Theories AMPL X Window System Theoretical computer science Computing Software engineering
104	Verified software: theories, tools, experiments Vision of a Grand Challenge project Tony Hoare and Jay Misra July 2005 Add to Reading List Source URL: vstte.ethz.ch Language: English - Date: 2005-07-29 10:40:50 Applied mathematics Computing Formal verification Model checking Programming tool Programming language Exception handling Device driver synthesis and verification Computer-aided software engineering Formal methods Logic in computer science Theoretical computer science
105	Origin System Design Methodology and Experience: 1M-gate ASICs and Beyond Ásgeir Th. Eiríksson, John Keen, Alex Silbey, Swami Venkataraman, Michael Woodacre Silicon Graphics Inc., Mountain View, CA Abstract. Add to Reading List Source URL: vintagecomputers.info Language: English - Date: 1999-02-05 11:20:10 SGI Origin Integrated circuit design Logic simulation Standard cell Verilog Physical design High-level synthesis Synopsys R10000 Electronic engineering Digital electronics Electronic design automation
106	Origin System Design Methodology and Experience: 1M-gate ASICs and Beyond Ásgeir Th. Eiríksson, John Keen, Alex Silbey, Swami Venkataraman, Michael Woodacre Silicon Graphics Inc., Mountain View, CA Abstract. Add to Reading List Source URL: www.sgidepot.co.uk Language: English - Date: 2008-04-15 16:23:14 SGI Origin Integrated circuit design Logic simulation Standard cell Verilog Physical design High-level synthesis Synopsys R10000 Electronic engineering Digital electronics Electronic design automation
107	Success Story Synopsys and Ricoh Ricoh Delivers Software 5 Months in Advance for New Multi-Function Printer with Synopsys Virtualizer Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-12-30 08:15:46 Synopsys Digital electronics Software development process High-level synthesis Logic synthesis Ricoh Electronic engineering Electronic design automation Hillsboro Oregon
108	Achieving Complexity and Reliability on Unreliable Platforms Pauline C. Haddow and Morten Hartmann The Norwegian University of Science and Technology Department of Computer and Information Science Sem Sælands vei 7-9, 7 Add to Reading List Source URL: www.nik.no Language: English - Date: 2002-10-17 07:54:31 Integrated circuits Digital electronics Field-programmable gate array Logic gate Logic synthesis Design closure Application-specific integrated circuit Logic simulation Fault-tolerant system Electronic engineering Electronics Electronic design
109	Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-12-30 08:15:46 Hardware verification languages Hillsboro Oregon Synopsys High-level synthesis SystemC System on a chip Logic synthesis Ricoh Electronic engineering Electronic design automation Electronic design
110	Advanced encoding of programs CS294: Program Synthesis for Everyone Ras Bodik Emina Torlak Division of Computer Science Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2012-09-09 10:02:45 Model theory Electronic design automation Relational model Z3 Unsatisfiable core Logic synthesis First-order logic Transitive closure Finitary relation Logic Mathematics Mathematical logic

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